FROM 28/11/2022 PHIPHASE LIMITED IS UNABLE TO TAKE ON ANY NEW CONTRACTS.Capabilities
Phiphase specialise in:
- System architecture design
- System analysis
- RF and electronics design
- FPGA firmware development
- Software development and
- Characterisation testing
Phiphase Limited offers our clients technical consultancy and where necessary, training. Our many years of experience in the wireless and space industries can be brought to bear on your project. We offer hourly or daily consultancy, or firm fixed price (FFP) contracts whatever suits our you best.
Analysis and Simulation
We use MATLAB for most of our DSP and system analysis and simulation work and AWR (now Cadence) Microwave Office for RF (linear, non-linear harmonic balance, load-pull simulations) and EM structure simulation using EMSight. RF system performance analysis uses spreadsheets (e.g. for link budgets) adapted from our standard CCSDS and DVB-S2(x) link budgets to suit client needs. We also use ADISimRF for gain distributions.
Our electronics/RF design capability produces RF and microwave solutions from VHF to Microwaves at present. Many of our designs are produced using KiCAD and Microwave Office and include schematic capture, PCB layout, EM simulations where applicable, ICDs and manufacturing files such as board specifications and Gerber files.
We have developed our own bespoke Visio Stencil designed for communications system and electronics architecture design.
For FPGA hardware simulation (verification) in VHDL, we use ModelSim PE. We are also familiar with all the major FPGA vendors’ tool flows, Xilinx Vivado, Intel Quartus and Microchip (formerly Microsemi) Libero.
Algorithm Development, Validation and Verification
It is vital that an algorithm can be developed as a concept validation to prove the algorithm works and provides the required performance. Using MATLAB or sometimes a C/C++ model (or both) we can convert the “full precision” simulation model to “finite precision”, targeted towards implementation in a SoC, DSP chip or FPGA. We then re-validate the algorithm’s performance with finite precision. The same model can often be used to generate test vectors for the FPGA or DSP verification loop. We also use hardware-in-the-loop to speed up some verification where a development board or breadboard is used to execute the algorithms in real time.
High-Level Synthesis (HLS) offered by some FPGA vendors is a useful way of generating synthesisable, routable Verilog or VHDL from a C/C++ description. We have used HLS extensively in our more recent designs.
Though specialising in RF, DSP and digital electronics development and consultancy, we can develop “breadboard” Development Models usually in close collaboration with our clients. We tend to use off-the-shelf evaluation boards for RF and digital electronics and other RF modules to provide a complete RF-to-digits evaluation platform. This includes our Zynq-7 based software-defined radio (SDR).
We also have facilities to build RF modules using surface mount technology (SMT) and undertake tuning and testing over temperature using hired equipment.
Computers, Coding Standards and Documentation
At Phiphase Limited, we are essentially Linux-based but run Microsoft Windows 10 in a virtual machine for using software that only runs in Windows. We also run embedded Linux on our SDRs. All our computers run both daily and weekly backups.
Phiphase specialise in developing high-reliability, robust designs specifically designed to withstand the rigours of the space environment in terms of radiation susceptibility, thermal cycling and product assurance requirements. We adhere to well established coding standards and documentation is produced to the high standards demanded by the space industry.
Revision Control and CADM
We use GitHub repositories to provide revision control of our source code. Some repositories are shared with our clients who can download and work on our code whenever they need to. We normally adopt the CADM processes and procedures of our clients.